EMC training for embedded systems
Context & problem
ISTP wanted to offer final-year embedded-systems engineering students a module connecting EMC concepts with practical industrial electronic-design challenges. The aim is to go beyond theory and learn to connect observed behaviour with coupling, current-return paths, routing and filtering mechanisms.
Challenge & solution
Syloria designed a 25-hour programme: 16 hours covering EMC fundamentals, standards and testing, applied EMC design and signal integrity; 8 hours supervising LTspice practical sessions in half-sized groups; and a one-hour final assessment. Activities combine schematic and layout analysis, case studies, short quizzes, simulations and reasoning about design defects.
Outcome
The session is scheduled for 26–30 October 2026. The learning objective is for students to identify several EMC weaknesses in a schematic or layout, explain the mechanisms involved and propose prioritised corrective actions. Final assessment and satisfaction-survey results will be added after the course.
Is your firmware difficult to maintain and evolve?
Let's spend 30 minutes discussing your existing system: its context, the difficulties you face and some initial options. A simple conversation with no obligation.